Method and apparatus for electrographic drawing

ABSTRACT

Electrographic drawings and facsimiles are made by applying signals sequentially to a multiplicity of writing electrodes in an array in contact with an electrosensitive paper medium. The signals are distributed to the respective electrodes by timedivision demultiplexers, and the pulse length of the pulses applied to the electrodes is adjustable to a value less than the burnout time by adjusting the duration of the pulse provided by a monostable flipflop inserted in the signal chain ahead of the demultiplexer input.

United States Patent 1191 DuMont et a1.

METHOD AND APPARATUS FOR ELECTROGRAPHIC DRAWING Inventors:Hans-Christoph DuMont,

Malmsheim; Rainer Strohwald; Helmut Reilm, both of Stuttgart, all ofGermany Robert Bosch GmbH, Stuttgart, Germany Filed: Mar. 21, 1973 IAppl. No.1 343,397

Assignee:

Foreign Application Priority Data Mar. 30, 1972 Germany 2215519 US. Cl346/74 E, 178/66 R Int. Cl. 601d 15/06 Field of Search 346/74 ES, 74 E,74 SB,

346/74 SC; 178/66 R, 6.6 A

References Cited UNITED STATES PATENTS 4/1969 Rudy 346/74 E vIDEO 1 1Nov. 5, 1974 3,553,718 1/1971 Schierhorst et a1. 346/74 E 3,611,41110/1971 Mashier et a1. 346/74 E 3,613,103 10/1971 Harris 178/66 R3,644,931 2/1972 Stringer et al 1. 346/74 E Primary Examiner-Vincent P.Canney Attorney, Agent, or FirmFlynn & Frishauf Electrographic drawingsand facsimiles are made by applying signals sequentially to amultiplicity of writing electrodes in an array in contact with anelectrosensitive paper medium. The signals are distributed to therespective electrodes by time-division demultiplexers, and the pulselength of the pulses applied to the electrodes is adjustable to a valueless than the burnout time by adjusting the duration of the pulseprovided by a monostable flipflop inserted in the signal chain ahead ofthe demultiplexer input.

ABSTRACT 11 Claims, 3 Drawing Figures RESET CONTROL METHOD AND APPARATUSFOR ELECTROGRAPHIC DRAWING The invention relates to a method andapparatus for recording or reproducing visual information onelectrosensitive sheet material, particularly on metallized paper. Inparticular, the invention concerns the use of writing electrodesarranged next to each other in an array in which each of the electrodesis insulated from the other and is controlled by an individualcontrollable semiconductor device.

Methods and apparatus of this type are known in which one or more groupsof writing electrodes are constructed in the form of a so calledelectrode comb. In these arrangements, a separate signal source is usedfor each writing electrode and all of the signal sources simultaneouslycontrol the individual writing electrodes. The simultaneous activationof the writing electrodes gives rise to the disadvantage of circuitbridging between electrodes.

It is an object of this invention to provide a method and apparatus foractivating a multiplicity of juxtaposed writing electrodes to produce orreproduce graphic material, which avoids the disadvantage of bridgingbetween electrodes.

SUBJECT MATTER OF THE PRESENT INVENTION Briefly, the electrodes areactivated and controlled sequentially and the individual periods forwhich a single electrode is in circuit is kept shorter than the time inwhich a limiting effect in the writing is reached as the result of localburnout. Electrographic writing on metallized sheet material produces asmall are that causes metal particles to coalesce. By thus destroyingthe con tinuity of the metal film locally, the maximum electrographiceffect is reached when the arc burns out. It is desirable to conduct theoperation without any of the electrodes being activated long enough toreach burnout, even on a maximum signal. The electrodes are preferablyarranged in a line which sweeps across the paper and they are preferablyenergized in a progressive sequence in with each is connected forenergization after the preceding one in line. Any arbitrary sequence canbe used, however, especially for encoded transmission cases. Theelectrodes may, if desired, be arranged for closer packing in astaggered array, for instance, rather than all in one line.

To produce the sequential operation of the writing electrodes, atime-division demultiplexer is used to distribute time subdivisions ofthe signal to the respective electrodes. The number of outputs of thedemultiplexer must then be equal to the number of writing electrodes ofthe electrode group.

The invention is particularly useful for reproduction of line drawingsand incidental lettering and printing, and other two-valued (black andwhite, for example) graphic information. The information to be displayedon the electrosensitive sheet material is first supplied to one input ofa two input NAND gate, the other input of which is constituted by theclock pulses supplied by a timing circuit. The result is a series ofpulses of length determined by the clock pulses (i.e., by their period,duty cycle and polarity) and their presence or absence in any clockpulse period is dependent on the state of the input information in thatperiod. The demultiplexer is advanced by means of a binary counter whichoperates in response to the same clock pulses that are applied to theaforesaid NAND gate. The input to the demultiplexer is thus switched inturn to each of the outputs. Successive signal pulses proceed from eachof these outputs in turn to the respective control electrodes ofsemiconductor devices each of which electrically drives one of thewriting electrodes. The maximum pulse length is less than the clockpulse period, so that each electrode is activated for just one pulse andone signal pulse reaches only a single electrode.

In a further developed form of the invention, it is found desirable toprovide a monostable flip-flop (monoflop) circuit having a manuallyadjustable period to determine the pulse length and to interpose thiscircuit between the output of the NAND gate and the signal input of thedemultiplexer. ln this case, the pulses furnished by the NAND gate tothe monostable flip-flop may be either short or long, however the clockpulse gating may produce them, since the monoflop can operate either asa pulse stretcher or a pulse shortener. The modification of the writingtime made possible by the adjustment of the period of the monoflopcircuit provides control over the point size and hence the degree ofblackness of the graphic display, so that writing at various values ofgray is possible.

In another illustrative embodiment of the invention the writingelectrodes are grouped in a plurality of adjacent groups or sub-arrays,each of which comprises the same number of writing electrodes. Such anapparatus is also drven so that all of the writing electrodes are drivenin sequence and that the period for which a single electrode isactivated each time is less than the period in which the writing processwould come to an end by burnout. In this embodiment of the invention,each sub array of electrodes and their respective driving semiconductorsis provided with one of a number of identical demultiplexers, all ofwhich are advanced by a common binary counter. A number of additionalflipflops form a 3 bit binary counter provided for enabling each of thedemultiplexers in turn for a complete demultiplexing cycle, so that thesignal inputs of all the demultiplexers may be continuously fed inparallel with the same input signal. An extra set of NAND, is interposedbetween the pulse length determining (monoflop) circuit and each of thedemultiplexers, completes the counting function of the flip-flops, inassociation with additional inputs on each of the demultiplexersinterconnected in the counting circuit to provide the necessarysequencing of the demultiplexers. The several demultiplexer units, the 3bit flip-flop counter, and the 4 bit binary counter used to advance allthe demultiplexer units may be regarded as a two-stage demultiplexingmeans.

An additional pulse forming circuit is used to provide a suitable resetpulse after all of the demultiplexer units have each gone through onedemultiplexing cycle.

The invention will be described further by way of example with referenceto the accompanying drawings, wherein:

FIG. 1 is a diagram of a circuit according to the invention in which anarray of 16 adjacent electrodes is operated through a demultiplexer with16 outputs;

F lG. 2 is a diagram of a circuit in accordance with the invention inwhich five groups of 16 electrodes are operated through fivedemultiplexers, and

FIG. 3 is a graph showing pulses present in the circuits of FIGS. 1 and2.

In FIG. 1 the electrosensitive paper used as the medium for graphicalsignal display is designated with the reference numeral 20. For writinginformation on the electrosensitive paper 20, there is provided a group21 of 16 writing electrodes 8,, 8,, S S, which are arranged next to eachother and electrically insulated from each other. These writingelectrodes are respectively driven by writing transistors T,,, T,, TT,,, The collectors of the writing transistors are connected to therespective writing electrodes and their emitters are grounded, to theapparatus chassis, for example. The electrosensitive paper 20 isconnected to the writing voltage of -35 volts over a resistor 26.

A demultiplexer 31 of the time-division type serves the electrode group21. This demultiplexer is provided with 16 information outputsdesignated 0, 1, 2 and has four binary switching inputs A,, B,, C,, D,serving as tming information inputs and two enable inputs 6, and G Thedemultiplexer 31 can accordingly be a commercial type ofTTL-demultiplexer built in accordance with integrated circuittechniques, such as the type SN 74154 made by Texas Instruments.

The NAND gates may likewise be provided in integrated circuit form withseveral on one substrate (e.g., SN 7400 made by Texas Instruments). Thebinary counter 50 used to step the demultiplexer 31 may likewise by atype SN 7493 Texas Instruments circuit unit. The monoflop 41 may be anSN 74121 device of the same series.

The SN 74154 units used as demultiplexers are TTL logic devices in whichthe selected output is at LOW" logic voltage level while all the othersare at HIGH logic level provided that both of the enable (or strobe)inputs G, and G are likewise at LOW logic levl (otherwise the, selectedoutput is at HIGH logic level, the same as the unselected outputs, whichcorresponds to no electrographic writing in the present apparatus). TheLOW logic level could, for example, be 0.8 volts or less, and the HIGHlogic level 2 or more volts, in a low impedance circuit.

The writing electrodes S 5,, S 8,, through individual transistors T,,,T,, T; .T,, which, since of black and one of white are involved, may inthis case be of a switching" type. The information outputs l), 1, 2, 15of the demultiplexer 31 are connected over protective resistors R R,, RR respectively to the bases of the writing transistors T,,, T,, T,, T,,.

A NAND gate N with two inputs E and E is provided, to the first input ofwhich the signal to be dis played graphically is first supplied. Theoutput P of the NAND gate N is connected to the input 41 ofa monostableflip-flop circuit 40, the output pulse of which has a variable periodthe length of which is adjustable by a potentiometer which is not shownin the drawing. The output 42 of the monostable flip-flop (monoflop") 40is connected to the first enable input (1,, of the demultiplexer 31. Thesecond input E of the NAND gate N is connected to the pulse input 51 ofa 4 bit bi-.

nary counter 50, of which the information outputs A B C D are connectedto the information inputs A,, B,, C,, D, of the demultiplexer 31 toadvance the switching circuits of the latter. The second enable input Gof the demultiplexer 31 is grounded and thus is held in LOW" condition.Finally a second monostable flip-flop circuit 60 is provided of whichthe noninverting output 61 is connected to the reset input 52 of the 4bit binary counter 50. The reset control input of monoflop 60 may bederived from the counter 50, from the demultiplexer 31 or from anexternal timer.

The manner of operation of the circuit of FIG. 1 is as follows:

The information (VIDEO) to be graphically displayed on theelectrosensitive paper is applied as a signal to the first input E,,,,of NAND gate N (FIG. 3, second line). At the second input E of NAND gateN a clock pulse 0, externally supplied to the circuit appears which alsoadvances the 4 bit binary counter 50. The pulses appearing at the outputP of NAND gate N are shortened in duration in monoflop circuit 40 to avalue 1,,- corresponding to the switching time of each of the writingelectrodes S 8 ,8 515, this value being adjustable by a potentiometernot shown in the drawing. This period t,,- of the pulses appearing atthe output of monoflop 40 is so adjusted that it is shorter than thetime in which the electrographic effect would come to an end by burnout.

If short pulses rather than long pulses are put out by the NAND gateN,,, which as previously discussed depends upon the polarity and dutycycle of the clock pulses and the polarity in which the output pulsesare effective, then the monoflop 40 can operate as a pulse stretcherinstead of as a pulse shortener, with the result in any event being thesame. Furthermore, if the signals to be represented graphically are nottwo-valued, but are of various levels that are to be reproduced withgradation in the electrographic process, then the NAND gate N is not anordinary digital gate but it is in effect a switched amplifier and themonoflop 40 switches on an amplifier or other device (not shown) duringthe length of its output pulse so that the output of the combinedarrangement will have an amplitude corresponding to the signal at theinput of the system and a pulse length determined by the setting of themonoflop 40. It is also possible to have the amplitude of the inputsignal very the duration of the pulse produced by monoflop 40, by meansnot shown, instead of the provision of the manual pulse lengthadjustment.

The pulses taken from the output of monoflop 40 are supplied to thesignal input 0,, of demultiplexer 31, whereas the second signal input Gis held in the LOW condition. The clock pulse c as already mentioned,advances the 4 bit binary counter 50, which is to say that it causes theoutputs A B C D of the counter 50 to go through all 16 possible sets ofbinary conditions in logical sequence. These output count pulses of the4 bit binary counter 50 are provided to the information inputs A,, B,,C,, D, of the demultiplexer 31, causing the switching circuits of thelatter to be advanced as previously mentioned. In this way theinformation outputs 0, 1, 2, 15 of demultiplexer 31 are caused toproduce one after the other in sequence as timed by the pulses presentat the first input (3,, are switched to the LOW" condition for theperiod p of a single pulse. A writing pulse consequently appears only atthe particular information outputs which, at that moment, receive aVIDEO signal with the necessary information to produce a pulse. Thewriting pulses transmitted from the information outputs 0, l, 2, 15 ofdemultiplexer 31 are led to the base electrodes of writing transistorsT,,, T,, T, T,,, respectively over resistors R,,, R,, R R, After all ofthe writing electrodes have been connected in turn to the demultiplexer,the 4 bit binary counter 50 is reset to its original condition by areset pulse, the duration of which is determined by monoflop 60.

FIG. 2 shows a second embodiment of the invention. For the graphicdisplay of information on electrosensitive paper, there are hereprovided five adjacent electrode groups 21, 22, 23, 24, 25, each ofwhich contains 16 writing electrodes arranged next to each other andinsulated from each other. The writing electrodes of the first group 21are designated S,, S, S those of the second group 22 are designated S SS S, and so on. The writing electrodes S,, S, S 5, of each group arecontrolled over writing transistors T,,,,, T,,,, T T, where thesubscript i may take the value 1, 2, 3, 4 and 5 according to whether itrefers to the writing electrode or to the writing transistor in thefirst group 21, the second group 22, the third group 23, etc. Thecollectors of the writing transistors are connected to the writingelectrodes, while their emitters are grounded. The electrosensitivepaper is connected to the writing voltage of ---35 volts over a resistor26. Each of the five electrode groups 21, 22, 23, 24, is provided withone of the five identical demultiplexers 31, 32, 33, 34, 35. Eachdemultiplexer is provided with two signal inputs G, G and with fourbinary information inputs A,, 13,, C,, D,-, where the subscript i maytake the values 1, 2, 3, 4, 5 according to whethr the demultiplexer isassociated with the first electrode group 21, the second electrode group22, and so on. Each of the demultiplexers also has l6 informationoutputs, in each case designated 0, l, 2 15. These information outputsare connected to the base of the respective writing transistors T,, T, TT,,, over the resistors R,, R, R R respectively.

The NAND gate N,, is provided with two inputs E and E The output P ofthe NAND gate N is connected to the input 41 of a monoflop 40 of whichthe output pulses have a variable pulse duration i which may be variedby adjustment of a potentiometer not shown in the drawing. The secondinput E of NAND gate N,, is connected to a clock pulse source (notshown) and to the pulse input 51 of a 4 bit binary counter 50, theinformation of which are designated A B C and D These informationoutputs are connected to the information inputs A,, 8,, C,-, D,- of allthe demultiplexers 31, 32, 33, 34, 35, in which arrangement the outputA, is connected with all the inputs A,- (i l to 5), the output 8,, isconnected with all the inputs D,- (i= 1 to 5). the output C is connectedwith all the inputs C,- (i= 1 to 5) and the output D, is connected withall the inputs D,- (i=.l to 5).

Five NAND gates N,. N N,,, N, and N each with three inputs E, E E,, areprovided in connection with each of the five demultiplexers 31, 32, 33,34, 35. The outputs of these NAND gates are designated P,-, where i= lto 5. The first enable input G of the first deniultiplexer 3l isconnected to the output P, of NAND gate N,. the first enable input G ofthe second demultiplexer 32 is connected to the output P of NAND gate Nand so on. Each of the first inputs E, of the five NAND gates N,, N N NN is connected to the output 42 of monoflop 40.

ln this circuit three flip-flops F,, F, and F are provided. The input 70of first flip-flop F, is connected to the output D,, of 4 bit binarycounter 50. The input 80 of second flip-flop F is connected to thenoninverting output Q, of first flip-flop F,. The input 90 of thirdflipflop F is connected to the noninverting ogtput Q of second flip-flopF The inverting output Q of third flip-flop F is connected to the secondenable input G of fifth demultiplexer 35. The noninverting output 0,, ofthird flip-flop F is connected to the second enable inputs G G G and Gof the remaining four demultiplexers 31, 32, 33, 34. The second input B2f NAND gate N, is connected to the inverting output Q, of firstflip-flop F,. The third input E of NAND gate N, is connected to theinverting output 6 of second flip-flop F The second input E of NAND gateN is connected to the noninverting output Q, of first flipflop F,. Thethird input E o f NAND gate N is connected to the inverting output 0, ofsecond flip-flop F The second input E of NAND gate N is connected to theinverting output 6, of first flip-flop F,. The third input E of NANDgate N is connected to the noninverting output Q of second flip-flop FThe second input E of NAND gate N, is connected to the noninvertingoutput Q, of first flip-flop F,. The third input E of NAND gate N, isconnected to the noninverting output 02 of second flip-flop F The secondinput E of NAND gate N is connected to the noninverting output 0 ofthird flip-flop F The third input E of NAND gate N is held in HIGHcondition by connection to the supply voltage U A second monoflop isalso provided. The noninverting output 61 of monoflop 60 is connected tothe reset input 52 of the 4 bit binary counter 50. The inverting output62 of monoflop 60 is connected to the reset inputs 71, 81, 91 of thethree flip-flops F,, F and F3.

The reset control connection of monoflop 60 may be derived frommultiplexer 35, from flip-tlop F or from an external timer orsynchronizer (not shown).

The manner of operation ofthe circuit of FIG 2 is as follows:

The information (VIDEO) to be graphically displayed on electrosensitivepaper is applied to the first input E, of NAND gate N,,. Such a VlDEOsignal is shown in the second line of FIG. 3 by way of example. At thesecond input E2." of NAND gate N there is applied a clock pulse Cp whichis also applied to the input of4 bit binary counter 50 to advance thatcounter. The pulses appearing at the output P of NAND gate N has theirduration shortened in monoflop 40 to a value which corresponds to theswitching interval r,- of each of the individual electrodes 8,, S,, S,5, this value being adjustable by means of a potentiometer not shown inthe drawing. This duration t of the pulses formed at the output 42 ofmonoflop 40 is so adjusted that it is shorter than the time that wouldend the writing process by burnout. These pulses taken from the output42 of monoflop 40 are applied to the first inputs E, of the NAND gatesN,, of which the outputs P, are connected to the first signal inputs G,of the demultiplexers.

The clock pulse Cp, as already mentioned, advances at the same time the4 bit binary counter 50, so that at its information outputs A B C D all16 possible output combinations are provided in logical sequence. Theseoutput pulses of the 4 bit binary counter 50 are supplied to the severalparallel connected information inputs A,-, B,, C, and D, of thedemultiplexers 31, 32, 33, 34, 35. If both of the signal inputs 0, and Gof the demultiplexers were simultaneously in the LOW condition, then theinformation outputs 0, l, 2 l5 of the demultiplexers 31, 32, 33, 34 and35 would each in sequence and in the red above the writing impulses beconnected to the LOW condition for the duration t of a single pulse. Theoutputs of all demultiplexers would simultaneously be switched to LOW,and then all the l outputs, then all the 2 outputs and so on until whatthe sixteenth, all the outputs would be connected to LOW and then itwould begin again with all the 0 outputs.

By means of the flip-flops F F and F however, the second signal inputs Gof the demultiplexers are so switched that only one demultiplexer isfree to accept signalsat any time. The signals appearing at the outputpulses arising at the'information outputs 0, l, 2 15 of the,demultiplexers' 31, 32, 33, 34, 35 are furnished over the protectiveresistances R R R R to the baseelectrodes of the respective writingtransistors T ,-,'T, T 3, T which each in turn switch the writingvoltage through to the electrode for the duration t,,- of the pulse.After all of the writing electrodes S S 8 S of all groups 21, 22, 23, 24and 25 have been run through in sequence, in the illustrated case,therefore, after 80 clock pulses, all of the counters.50, F F F arereset to the initial condition by a reset pulse which has its durationdefined by the operation of monoflop 60.

Theinvention has been described in connection with VIDEO signals ofabinary or two-valued kind, because in the illustrated case of metallizedpaper writing material the darkness of writing is difficult to controllinearally with reference to pulse voltage, so that degrees of blacknessare adjusted by the monoflop pulse duration rather than otherwise.Consequently, the driving transistors T T,, T T may be switching typetransistors, since their function is to switch the writing voltage tothe electrode or not according to whether 21 VIDEO signal is present ornot during the period that the particular transistor is connectedthrough to the monoflop pulse generator 40 through the demultiplexer. Ifthere is no VIDEO signal present at the time of the corresponding clockpulse, the monopulse flip-flop 40 will electrode comb organizationtogether with the corresponding driving transistors, protectiveresistors and the multiplexers and such an electrode comb can consist ofindividual segments if more than one demultiplexer is used, with onesegment for the equipment as- 'sociated with each demultiplexer. Thewriting electrodes are preferably made of tungsten wire and they mayvery conveniently be provided by plating the end of thetungsten wire,which used to be connected to the transistor by electroplating withcopper, gold, silver, tin or a combination of those metals and thensoldering the plated end of the tungsten wire directly to the collectorconnection of the driving transistor with soft solder.

Although the invention has been disclosed with reference to specificembodiments, it will be understood that variations and modifications maybe made within the inventive concept without departing from the spiritof the invention.

We claim:

1. The method of visually recording electrical information by means of amultiplicity of writing electrodes, arranged in a substantially lineararray and electrically insulated from each other, on electrosensitivesheet material, which method comprises the steps of:

preparing information to be recorded in sequential form;

gating said information at intervals to produce a so quence of'pulseshaving a predetermined duration less than the shortest time required toproduce local burnout on said sheet materialtherefrom, and

connecting individual electrodes of said array in succession, for timeintervals longer than the duration of said pulses to a circuit supplyingsaid sequence of pulses,

thereby energizing those electrodes so connected when one of said pulsesis present and then only for the duration of said respective pulses.

2. The method of visually recording information by means of amultiplicity of writing electrodes, arranged next to each other andelectrically insulated from each other, on electrosensitive sheetmaterial the electrographic effect on which is limited by a localizedburnout characteristic, which method comprises the steps of:

modifying information to be recorded into the form of information pulsesof a duration less thanthe period in whichthe activation of one of said.electrodes would come to a stop by local burnout;

connecting said electrodes in time sequence to a source of informationso modified at switching intervals greater than the duration of saidinformation pulses,

thereby energizing those electrodes so connected when one of said pulsesis present and then for the duration of said respective pulses.

3. The method of visually recording electrical information by means of amultiplicity of writing electrodes, arranged in a substantially lineararray and electrically insulated from each other, on electrosensitivesheet material, which method comprises the steps of:

generating a sequence of clock pulses (c counting said pulses anddriving with count indicating signals (A, B, C, D) thereby produced thedistributive switching of a time-division demultiplexer applying saidclock pulses and also electrical information to be recorded to gatemeans (N to produce gated pulses of said electrical information;applying said gated pulses, or pulses derived therefrom, to the signalinput of said multiplexer; applying the distributed outputs of saiddemultiplexer respectively to the control electrodes of controlledsemiconductor devices (To, T T and controlling the energization of saidwriting electrodes (S 8,, S respectively by means of said controlledsemiconductor devices in such a manner as to energize said electrodessequentially, and each only when one of said gated pulses is present andthen only for the duration of such gated pulse.

4. A method as defined in claim 3 in which the modifying of theelectrical information to be recorded comprises the steps of:

applying said clock pulses and electrical information to be recorded tosaid gate means (N to produce gated pulses of said information;

deriving, from said gated pulses, pulses of a different time length lessthan said burnout period, and applying said derived pulses to the signalinput of said multiplexer.

5. Apparatus for displaying information on electrosensitive sheetmaterial, the electrographic effect on which is limited by a localizedburnout characteristic comprising:

an array of a multiplicity of adjacent writing electrodes electricallyinsulated from each other;

a clock pulse generator;

gate means (N for producing gated pulses timed by said clock pulses froma signal representative of information to be displayed; demultiplexingmeans (31) having a successive sequencing interval, determined by saidclock pulse generation, at least as long as the time required to producelocal burnout on said sheet material and including a binary counter (15)responsive to said clock pulses for distributing said pulses produced inresponse to operation of said gate means in sequence to the individualwriting electrodes of said array, said gate means accordingly being thesame for all pulses, and

circuit means incorporated in said gate means for assuring that theduration of pulses supplied to said demultiplexing means in response tooperation of said gate means is less than the time required to producelocal burnout on said sheet material.

6. Apparatus as defined in claim 5 in which said circuit meansincorporated in said gate means is a monostable pulse forming means (40)of adjustable pulse length interposed between said gate means and saidmultiplexer.

7. Apparatus as defined in claim 5 in which a multiplicity of controlledsemiconductor devices (T T T T are interposed between the outputs ofsaid demultiplexing means (31) and the respective writing electrodes (58,, S 5, of said array to control the energization of said writingelectrodes.

8. Apparatus for displaying information on electrosensitive sheetmaterial, the electrographic effect on which is limited by a localizedburnout characteristic, comprising:

an array of a multiplicity of adjacent writing electrodes electricallyinsulated from each other, said electrodes of said array being disposedin a plurality of sub arrays (21, 22, 23, 24, 25), each comprising thesame number of writing electrodes (8 i, 8,,

II, S2, S15,

a clock pulse generator;

monostable gate means (N for producing, from a signal representative ofinformation to be displayed, gated pulses timed by said clock pulsegenerator and having a duration less than the time required to producelocal burnout on said sheet material;

plurality of functionally identical demultiplexers (31, 32, 33, 34, 35)timed by said clock pulse generation and respectively arranged todistribute said gated pulses in turn to each sub array (21, 22, 23, 24,25) of said writing electrodes, each of said dcmultiplexers hiving twosignal inputs and having individual gate means connected between a firstsignal input of said demultiplexer and the output of said monostablegate means, said individual gate means having a first input to which theoutput of said monostable circuit is connected and two additionalinputs;

a resetting circuit; and

a plurality of flip-flop circuits are interconnected with each other,with the second and third inputs of said individual gate means and withthe second inputs of said demultiplexers and also with said resettingcircuit, so that each of said demultiplexers will be activated for acomplete cycle of operation in sequence while the others of saiddemultiplexers are furnishing no output, whereby each one of saidwriting electrodes will be activated in turn.

9. Apparatus as defined in claim 8 in which one or more of said subarrays of writing electrodes are mounted on an electrode comb consistingof individual segments which contain writing electrodes, drivingsemiconductor devices therefor, and demultiplexers.

10. Apparatus as defined in claim 9 in which the writing electrodes aremade up of tungsten wires.

11. A method of making an apparatus for electrographically displayingformation in which the ends of the tungsten wires forming the writingelectrodes of said apparatus which are to be connected to the respectivedriving semiconductor devices of said apparatus are electroplated with ametallic material selected from the group consisting of the metalscopper, gold, silver, tin, and combinations of said metals assimultaneously electroplated, and are then affixed with the thuselectroplated end soldered with soft solder to the collector connectionof the corresponding driving semiconductor device.

1. The method of visually recording electrical information by means of amultiplicity of writing electrodes, arranged in a substantially lineararray and electrically insulated from each other, on electrosensitivesheet material, which method comprises the steps of: preparinginformation to be recorded in sequential form; gating said informationat intervals to produce a sequence of pulses having a predeterminedduration less than the shortest time required to produce local burnouton said sheet material therefrom, and connecting individual electrodesof said array in succession, for time intervals longer than the durationof said pulses to a circuit supplying said sequence of pulses, therebyenergizing those electrodes so connected when one of said pulses ispresent and then only for the duration of said respective pulses.
 2. Themethod of visually recording information by means of a multiplicity ofwriting electrodes, arranged next to each other and electricallyinsulated from each other, on electrosensitive sheet material theelectrographic effect on which is limited by a localized burnoutcharacteristic, which method comprises the steps of: modifyinginformation to be recorded into the form of information pulses of aduration less than the period in which the activation of one of saidelectrodes would come to a stop by local burnout; connecting saidelectrodes in time sequence to a source of information so modified atswitching intervals greater than the duration of said informationpulses, thereby energizing those electrodes so connected when one ofsaid pulses is present and then for the duration of said respectivepulses.
 3. The method of visually recording electrical information bymeans of a multiplicity of writing electrodes, arranged in asubstantially linear array and electrically insulated from each other,on electrosensitive sheet material, which method comprises the steps of:generating a sequence of clock pulses (cp); counting said pulses anddriving with count indicating signals (A, B, C, D) thereby produced thedistributive switching of a time-division demultiplexer (31); applyingsaid clock pulses and also electrical information to be recorded to gatemeans (N0) to produce gated pulses of said electrical information;applying said gated pulses, or pulses derived therefrom, to the signalinput of said multiplexer; applying the distributed outputs of saiddemultiplexer respectively to the control electrodes of controlledsemiconductor devices (T0, T1, T2 . . . ), and controlling theenergization of said writing electrodes (S0, S1, S2 . . . ) respectivelyby means of said controlled semiconductor devices in such a manner as toenergize said electrodes sequentially, and each only when one of saidgated pulses is present and then only for the duration of such gatedpulse.
 4. A method as defined in claim 3 in which the modifying of theelectrical information to be recorded comprises the steps of: applyingsaid clock pulses and electrical information to be recorded to said gatemeans (N0) to produce gated pulses of said information; deriving, fromsaid gated pulses, pulses of a different time length less than saidburnout period, and applying said derived pulses to the signal input ofsaid multiplexer.
 5. Apparatus for displaying information onelectrosensitive sheet material, the electrographic effect on which islimited by a localized burnout characteristic comprising: an array of amultiplicity of adjacent writing electrodes electrically insulated fromeach other; a clock pulse generator; gate means (N0) for producing gatedpulses timed by said clock pulses from a signal representative ofinformation to be displayed; demultiplexing means (31) having asuccessive sequencing interval, determined by said clock pulsegeneration, at least as long as the time required to produce localburnout on said sheet material and including a binary counter (15)responsive to said clock pulses for distributing said pulses produced inresponse to operation of said gate means in sequence to the individualwriting electrodes of said array, said gate means accordingly being thesame for all pulses, and circuit means incorporated in said gate meansfor assuring that the duration of pulses supplied to said demultiplexingmeans in response to operation of said gate means is less than the timerequired to produce local burnout on said sheet material.
 6. Apparatusas defined in claim 5 in which said circuit means incorporated in saidgate means is a monostable pulse forming means (40) of adjustable pulselength interposed between said gate means and said multiplexer. 7.Apparatus as defined in claim 5 in which a multiplicity of controlledsemiconductor devices (T0, T1, T2 . . . T15) are interposed between theoutputs of said demultiplexing means (31) and the respective writingelectrodes (S0, S1, S2 . . . S15) of said array to control theenergization of said writing electrodes.
 8. Apparatus for displayinginformation on electrosensitive sheet material, the electrographiceffect on which is limited by a localized burnout characteristic,comprising: an array of a multiplicity of adjacent writing electrodeselectrically insulated from each other, said electrodes of said arraybeing disposed in a plurality of sub arrays (21, 22, 23, 24, 25), eachcomprising the same number of writing electrodes (S0, i, S1, i, S2, i .. . S15, i); a clock pulse generator; monostable gate means (N0) forproducing, from a signal representative of information to be displayed,gated pulses timed by said clock pulse generator and having a durationless than the time required to produce local burnout on said sheetmaterial; a plurality of functionally identical demultiplexers (31, 32,33, 34, 35) timed by said clock pulse generation and respectivelyarranged to distribute said gated pulses in turn to each sub array (21,22, 23, 24, 25) of said writing electrodes, each of said demultiplexershiving two signal inputs and having individual gate means connectedbetween a first signal input of said demultiplexer and the output ofsaid monostable gate means, said individual gate means having a firstinput to which the output of said monostable circuit is connected andtwo additional inputs; a resetting circuit; and a plurality of flip-flopcircuits are interconnected with each other, with the second and thirdinputs of said individual gate means and with the second inputs of saiddemultiplexers and also with said resetting circuit, so that each ofsaid demultiplexers will be activated for a complete cycle of operationin sequence while the others of said demultiplexers are furnishing nooutput, whereby each one of said writing electrodes will be activated inturn.
 9. Apparatus as defined in claim 8 in which one or more of saidsub arrays of writing electrodes are mounted on an electrode combconsisting of individual segments which contain writing electrodes,driving semiconductor devices therefor, and demultiplexers. 10.Apparatus as defined in claim 9 in which the writing electrodes are madeup of tungsten wires.
 11. A method of making an apparatus forelectrographically displaying formation in which the ends of thetungsten wires forming the writing electrodes of said apparatus whichare to be connected to the respective driving semiconductor devices ofsaid apparatus are electroplated with a metallic material selected fromthe group consisting of the metals copper, gold, silver, tin, andcombinations of said metals as simultaneously electroplated, and arethen affixed with the thus electroplated end soldered with soft solderto the collector connection of the corresponding driving semiconductordevice.